/* SuperVGA timing from NEC monitor manual Horizontal : ______________ _____________ | | | _______________| VIDEO |_______________| VIDEO (next line) ___________ _____________________ ______________________ |_| |_| B C <------D-----><-E-> <----------A----------> Vertical : ______________ _____________ | | | _______________| VIDEO |_______________| VIDEO (next frame) ___________ _____________________ ______________________ |_| |_| P Q <------R-----><-S-> <----------O----------> For VESA 800*600 @ 60Hz: Fh (kHz) :37.88 A (us) :26.4 B (us) :3.2 C (us) :2.2 D (us) :20.0 E (us) :1.0 Fv (Hz) :60.32 O (ms) :16.579 P (ms) :0.106 Q (ms) :0.607 R (ms) :15.84 S (ms) :0.026 Horizonal timing information: Mode name Pixel sync back active front whole line clock pulse porch time porch period (MHz) (us) (pix) (pix) (pix) (pix) (pix) VGA 800x600 60Hz 40 3.2 128 85 806 37 1056 Vertical timing information: Mode name Lines line sync back active front whole frame Total width pulse porch time porch period (us) (us)(lin) (us)(lin) (us) (lin) (us)(lin) (us) (lin) VGA 800x600 60Hz 628 26.40 106 4 554 21 15945 604 -1* 16579 628 */ module vga_vl(resetn, clock, orient, hsync, vsync, pixel, blank ); input resetn,clock,orient; output hsync,vsync,blank; output [2:0] pixel; wire hsync; reg vsync; reg [2:0] pixel; //Horizontal timing constants parameter H_PIXELS = 'd806,//'d640, H_FRONTPORCH = 'd37,//16, H_SYNCTIME = 'd128,//'d96, H_BACKPORCH = 'd85,//48, H_SYNCSTART = 'd843,// H_PIXELS + H_FRONTPORCH, H_SYNCEND = 'd971,// H_SYNCSTART + H_SYNCTIME, H_PERIOD = 'd1056,//H_SYNCEND + H_BACKPORCH, //Vertical timing constants V_LINES = 'd604,//48, V_FRONTPORCH = -1,//'d10, V_SYNCTIME = 'd4,//2, V_BACKPORCH = 'd21,//33, V_SYNCSTART = 'd603, //V_LINES + V_FRONTPORCH, V_SYNCEND = 'd607,// V_SYNCSTART + V_SYNCTIME, V_PERIOD = 'd628; //V_SYNCEND + V_BACKPORCH; reg [10:0] hcnt,vcnt; reg enable,hsyncint; //Horizontal counter of pixels always @ (posedge clock or negedge resetn) if(!resetn) hcnt <= 0; else if(hcnt= H_SYNCSTART && hcnt < H_SYNCEND) hsyncint <= 0; else hsyncint<= 1; //Horizontal synchronization output assign hsync = hsyncint; //Vertical counter of lines always @ (posedge hsyncint or negedge resetn) if(!resetn) vcnt<=0; else if(vcnt < V_PERIOD) vcnt <= vcnt + 1; else vcnt<=0; //Vertical synchronization pulse generation (negative polarity) always @ (posedge hsyncint or negedge resetn) if(!resetn) vsync <=1; else if(vcnt >= V_SYNCSTART && vcnt < V_SYNCEND) vsync <=0; else vsync <=1; //Enabling of color outputs always @ (posedge clock or negedge resetn) if(!resetn) enable<=0; else if(hcnt >= H_PIXELS || vcnt >= V_LINES) enable<=0; else enable<=1; //Output image generation (horizontal or vertical color stripes) always @ ( enable or orient or hcnt or vcnt) if(enable==0) pixel = 0; else if(orient) begin if(vcnt<75) pixel='h1; else if(vcnt<150) pixel='h2; else if(vcnt<225) pixel='h3; else if(vcnt<300) pixel='h4; else if(vcnt<375) pixel='h5; else if(vcnt<450) pixel='h6; else if(vcnt<525) pixel='h7; else pixel='h0; end else begin if(hcnt<100) pixel='h1; else if(hcnt<200) pixel='h2; else if(hcnt<300) pixel='h3; else if(hcnt<400) pixel='h4; else if(hcnt<500) pixel='h5; else if(hcnt<600) pixel='h6; else if(hcnt<700) pixel='h7; else pixel='h0; end assign blank = enable; endmodule