//93C46 STORAGE CARD INVERTER(All IO inverted by 74HC14) #if CARD_93C46_INV //#define MOSI PB3 //تن³ِ1 #define MOSI_RST {DDRB|=0x08;PORTB|= 0X08;} #define MOSI_SET {DDRB|=0x08;PORTB&= 0XF7;} #define READ_MOSI (PINB&0X08) //#define SCK PB5 //تن³ِ1 #define SCK_SET {DDRB|=0x20;PORTB&= 0XDF;} #define SCK_RST {DDRB|=0x20;PORTB|= 0X20;} //#define CSN PB2 //تن³ِ1 #define CS_RST {DDRB|=0x04;PORTB|= 0X04;} #define CS_SET {DDRB|=0x04;PORTB&= 0XFB;} //#define MISO PB4 //تنبë0 #define MISO_RST {DDRB|=0x10;PORTB|= 0X10;} #define MISO_SET {DDRB|=0x10;PORTB&= 0XEF;} #define READ_MISO (!(PINB&0X10))// #endif // Write enable must precede all programming modes. void Ewen(void) { unsigned char temp,InData; CS_RST; SCK_RST; CS_SET; InData=0x98;// 10011XXXX for(temp=9;temp!=0;temp--) { // 9 if(InData&0x80) { MOSI_SET; } else { MOSI_RST; } SCK_SET; delay_us(5); SCK_RST; } CS_RST; } // Disables all programming instructions. void Ewds(void) { unsigned char temp,InData; CS_RST; SCK_RST; CS_SET; InData=0x80; // 10000XXXX for(temp=9;temp!=0;temp--) { // 9 if(InData&0x80) { MOSI_SET; } else { MOSI_RST; } SCK_SET; delay_us(5); SCK_RST; InData<<=1; } CS_RST; } // Reads data stored in memory, at specified address. unsigned int Read(unsigned char address) { unsigned char temp; unsigned int result; Ewen(); SCK_RST; CS_RST; MOSI_SET; CS_SET; SCK_SET; SCK_RST; address=(address&0x3f)|0x80; for(temp=8;temp!=0;temp--) { // 8 if(address&0x80) { MOSI_SET; } else { MOSI_RST; } SCK_SET; delay_us(5); SCK_RST; address<<=1; } for(temp=16;temp!=0;temp--) { // 16 SCK_SET; result=(result<<1)|READ_MISO; SCK_RST; } CS_RST; Ewds(); return(result); } // Writes memory location An - A0. void Write(unsigned char address,unsigned int InData) { unsigned char temp; Ewen(); CS_RST; SCK_RST; MOSI_SET; CS_SET; SCK_SET; delay_us(5);//(unsigned int time) SCK_RST; address=(address&0x3f)|0x40; for(temp=8;temp!=0;temp--) { // 8 if(address&0x80) { MOSI_SET; } else { MOSI_RST; } SCK_SET; delay_us(5); SCK_RST; address<<=1; } for(temp=16;temp!=0;temp--) { // 16 if(InData&0x8000) { MOSI_SET; } else { MOSI_RST; } SCK_SET; delay_us(5); SCK_RST; InData<<=1; } CS_RST; CS_SET; SCK_SET; while(!READ_MISO)// busy test { SCK_RST; delay_us(5);// int time) SCK_SET; } SCK_RST; CS_RST; Ewds(); }