00001
00002
00003
00004
00005
00006
00007
00008
00009
00010
00011
00012
00013
00014
00015
00016
00017
00018
00019
00020
00021
00022
00023
00024
00025
00026
00027
00028
00029
00030 #ifndef LIS3L02_H
00031 #define LIS3L02_H
00032
00033 #include "global.h"
00034
00035
00036 #define LIS3L02_I2C_ADDR 0x3A //< Base I2C address of LIS3L02 device
00037
00038
00039 #define LIS3L02_REG_OFFSETX 0x16 //< LIS3L02 X-axis digital offset trim
00040 #define LIS3L02_REG_OFFSETY 0x17 //< LIS3L02 Y-axis digital offset trim
00041 #define LIS3L02_REG_OFFSETZ 0x18 //< LIS3L02 Z-axis digital offset trim
00042 #define LIS3L02_REG_GAINX 0x19 //< LIS3L02 X-axis digital gain trim
00043 #define LIS3L02_REG_GAINY 0x1A //< LIS3L02 Y-axis digital gain trim
00044 #define LIS3L02_REG_GAINZ 0x1B //< LIS3L02 Z-axis digital gain trim
00045 #define LIS3L02_REG_CTRLREG1 0x20 //< LIS3L02 interface/operation control
00046 #define LIS3L02_REG_CTRLREG2 0x21 //< LIS3L02 interface/operation control
00047 #define LIS3L02_REG_WAKEUPCFG 0x23 //< LIS3L02 interrupt/wakeup config
00048 #define LIS3L02_REG_WAKEUPSRC 0x24 //< LIS3L02 interrupt/wakeup source indicator
00049 #define LIS3L02_REG_WAKEUPACK 0x25 //< LIS3L02 wakeup source clear
00050 #define LIS3L02_REG_STATUS 0x27 //< LIS3L02 Accelerometer Status
00051 #define LIS3L02_REG_OUTXL 0x28 //< LIS3L02 Accelerometer X Output Low-byte
00052 #define LIS3L02_REG_OUTXH 0x29 //< LIS3L02 Accelerometer X Output High-byte
00053 #define LIS3L02_REG_OUTYL 0x2A //< LIS3L02 Accelerometer Y Output Low-byte
00054 #define LIS3L02_REG_OUTYH 0x2B //< LIS3L02 Accelerometer Y Output High-byte
00055 #define LIS3L02_REG_OUTZL 0x2C //< LIS3L02 Accelerometer Z Output Low-byte
00056 #define LIS3L02_REG_OUTZH 0x2D //< LIS3L02 Accelerometer Z Output High-byte
00057 #define LIS3L02_REG_THSL 0x2E //< LIS3L02 Accelerometer Threshold Low-byte
00058 #define LIS3L02_REG_THSH 0x2F //< LIS3L02 Accelerometer Threshold High-byte
00059 #define LIS3L02_REG_MULTIREAD 0x80 //< LIS3L02 Mutliple Read Bit
00060
00061
00062 #define LIS3L02_CTRLREG1_XEN 0x01 //< LIS3L02 CtrlReg1 X-axis Enable
00063 #define LIS3L02_CTRLREG1_YEN 0x02 //< LIS3L02 CtrlReg1 Y-axis Enable
00064 #define LIS3L02_CTRLREG1_ZEN 0x04 //< LIS3L02 CtrlReg1 Z-axis Enable
00065 #define LIS3L02_CTRLREG1_ST 0x08 //< LIS3L02 CtrlReg1 Self-Test Enable
00066 #define LIS3L02_CTRLREG1_DF0 0x10 //< LIS3L02 CtrlReg1 Decimation Factor 0
00067 #define LIS3L02_CTRLREG1_DF1 0x20 //< LIS3L02 CtrlReg1 Decimation Factor 0
00068 #define LIS3L02_CTRLREG1_PD0 0x40 //< LIS3L02 CtrlReg1 Power-down Control 0
00069 #define LIS3L02_CTRLREG1_PD1 0x80 //< LIS3L02 CtrlReg1 Power-down Control 1
00070
00071
00072 #define LIS3L02_CTRLREG2_DAS 0x01 //< LIS3L02 CtrlReg2 Data Alignment Selection
00073 #define LIS3L02_CTRLREG2_SIM 0x02 //< LIS3L02 CtrlReg2 SPI Mode Select
00074 #define LIS3L02_CTRLREG2_DRDY 0x04 //< LIS3L02 CtrlReg2 Enable Data-Ready generation
00075 #define LIS3L02_CTRLREG2_IEN 0x08 //< LIS3L02 CtrlReg2 Interrupt Enable
00076 #define LIS3L02_CTRLREG2_BOOT 0x10 //< LIS3L02 CtrlReg2 Reboot from memory
00077 #define LIS3L02_CTRLREG2_FS 0x80 //< LIS3L02 CtrlReg2 Full-scale Select (0=2g, 1=6g)
00078
00079
00080 #define LIS3L02_WAKEUPCFG_MXL 0x01 //< LIS3L02 WAKEUPCFG Mask X Low Interrupt
00081 #define LIS3L02_WAKEUPCFG_MXH 0x02 //< LIS3L02 WAKEUPCFG Mask X High Interrupt
00082 #define LIS3L02_WAKEUPCFG_MYL 0x04 //< LIS3L02 WAKEUPCFG Mask Y Low Interrupt
00083 #define LIS3L02_WAKEUPCFG_MYH 0x08 //< LIS3L02 WAKEUPCFG Mask Y High Interrupt
00084 #define LIS3L02_WAKEUPCFG_MZL 0x10 //< LIS3L02 WAKEUPCFG Mask Z Low Interrupt
00085 #define LIS3L02_WAKEUPCFG_MZH 0x20 //< LIS3L02 WAKEUPCFG Mask Z High Interrupt
00086 #define LIS3L02_WAKEUPCFG_LIR 0x40 //< LIS3L02 WAKEUPCFG Latch Intr Request
00087
00088
00089 #define LIS3L02_WAKEUPSRC_XL 0x01 //< LIS3L02 WAKEUPSRC X Low Interrupt
00090 #define LIS3L02_WAKEUPSRC_XH 0x02 //< LIS3L02 WAKEUPSRC X High Interrupt
00091 #define LIS3L02_WAKEUPSRC_YL 0x04 //< LIS3L02 WAKEUPSRC Y Low Interrupt
00092 #define LIS3L02_WAKEUPSRC_YH 0x08 //< LIS3L02 WAKEUPSRC Y High Interrupt
00093 #define LIS3L02_WAKEUPSRC_ZL 0x10 //< LIS3L02 WAKEUPSRC Z Low Interrupt
00094 #define LIS3L02_WAKEUPSRC_ZH 0x20 //< LIS3L02 WAKEUPSRC Z High Interrupt
00095 #define LIS3L02_WAKEUPSRC_IA 0x40 //< LIS3L02 WAKEUPSRC Interrupt Active
00096
00097
00098 #define LIS3L02_STATUS_XDA 0x01 //< LIS3L02 STATUS X New Data Available
00099 #define LIS3L02_STATUS_YDA 0x02 //< LIS3L02 STATUS Y New Data Available
00100 #define LIS3L02_STATUS_ZDA 0x04 //< LIS3L02 STATUS Z New Data Available
00101 #define LIS3L02_STATUS_ZYXDA 0x08 //< LIS3L02 STATUS XYZ New Data Available
00102 #define LIS3L02_STATUS_XOR 0x10 //< LIS3L02 STATUS X-axis Data Overrun
00103 #define LIS3L02_STATUS_YOR 0x20 //< LIS3L02 STATUS Y-axis Data Overrun
00104 #define LIS3L02_STATUS_ZOR 0x40 //< LIS3L02 STATUS Z-axis Data Overrun
00105 #define LIS3L02_STATUS_ZYXOR 0x80 //< LIS3L02 STATUS XYZ-axis Data Overrun
00106
00107
00108
00109
00110
00111
00112
00113 u08 lis3l02Init(void);
00114
00115
00116 u08 lis3l02Reset(void);
00117
00118
00119 u08 lis3l02ReadReg(u08 reg);
00120
00121
00122 u08 lis3l02WriteReg(u08 reg, u08 data);
00123
00124
00125 s16 lis3l02GetAccel(u08 chxyz);
00126
00127 #endif